Zhaori Bi (毕朝日)

Assistant Professor. Fudan University, Shanghai, zhaori_bi AT fudan.edu.cn

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Bi, Zhaori, Ph.D., is an Assistant Professor at Fudan University, Shanghai. He obtained his Master’s and Ph.D. degrees at the University of Texas at Dallas in Electrical Engineering and Computer Engineering in May 2013 and December 2017, respectively. In 2017, he worked as an intern CAD engineer at the R&D division of Austria Mikro Systeme, Plano, United States. He joined Fudan University in 2018. His current research focuses on analog integrated circuit design automation, black-box optimization methods and medical AI.

news

Oct 15, 2024 Our paper titled "A RISC-V PPA-fusion Cooperative Optimization Framework Based on Hybrid Strategies" has been accepted with 2024 IEEE Transactions on Very Large Scale Integration Systems.!
Oct 10, 2024 Our paper titled "Risk‐stratified management of cervical high‐grade squamous intraepithelial lesion based on machine learning" has been accepted with 2024 Journal of Medical Virology!
Oct 10, 2024 Our paper titled "pPIRW： An Efficient and Accurate Pre-calculation Path Integral Random Walk Solver for Steady-State Thermal Simulation With Robin Boundary Conditions" has been accepted with 2024 TCAD!
Sep 10, 2024 Our paper titled "ATOM:An Automatic Topology Synthesis Framework for Operational Amplifiers" has been accepted with 2024 TCAD!
Sep 10, 2024 Our paper, titled 'HD-MCTS:An Analog Circuit Optimization Algorithm Based on High-Dimensional Monte Carlo Tree Search,' was awarded the Best Paper at the 2024 2nd International Symposium on Electronics Design Automation (ISEDA).
Sep 10, 2024 Our paper titled "VTSMOC:An Efficient Voronoi Tree Search Boosted Multi-objective Bayesian Optimization with Constraints for High-dimensional Analog Circuit Synthesis" has been accepted with 2024 TCAD!
Jul 10, 2024 Our paper titled "ROI-HIT： Region of Interest-driven High- dimensional Microarchitecture Design Space Exploration" has been accepted with 2024 ESWEEK!
Jul 6, 2024 Our paper titled "Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis" has been accepted with 2024 ICCAD!
May 6, 2024 Our paper titled "Exploring High-dimensional Search Space via Voronoi Graph Traversing" has been accepted with 2024 UAI!
Apr 3, 2024 We won the OpenDACs 2023 Competition 1st place Award!
Mar 16, 2024 Our paper titled "EVDMARL： Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration" has been accepted with 2024 61th DAC!
Mar 16, 2024 Our paper titled "HiMOSS： A Novel High-Dimensional Multi-Objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing" has been accepted with 2024 61th DAC!
Feb 2, 2024 Our paper titled "D3PBO Dynamic Domain Decomposition based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing" has been accepted with ACM Transactions on Design Automation of Electronic Systems!
Dec 2, 2023 Our paper titled "Circuits Physics Constrained Predictor of Static IR Drop with Limited Data" has been accepted with 2024 DATE!
Dec 2, 2023 Our paper titled "tSS-BO： Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling" has been accepted with 2024 DATE!
Dec 1, 2023 Our paper titled "Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing" has been accepted with 2024 29th ASP-DAC!
Dec 1, 2023 Our paper titled "A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation"(Invited Paper) has been accepted with 2024 29th ASP-DAC!
Nov 1, 2023 We won the IEEE ICCAD CAD 2023 Problem C Honorable Mention Award!
Jul 1, 2023 I joined Integration, the VLSI journal as an Associate Editor.
Jun 7, 2023 Our paper titled "cVTS：A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis" has been accepted with 2023 60th DAC!

selected publications

  1. DAC
    HiMOSS: A Novel High-Dimensional Multi-Objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing
    Tianchen Gu, Ruiyu Lyu, Zhaori Bi*, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, and Xuan Zeng
    In 2024 61th ACM/IEEE Design Automation Conference (DAC 24), 2024
  2. DAC
    EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration
    Handa Sun, Zhaori Bi*, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, and Xuan Zeng
    In 2024 61th ACM/IEEE Design Automation Conference (DAC 24), 2024
  3. DAC
    cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis
    Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi*, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, and Xuan Zeng
    In 2023 60th ACM/IEEE Design Automation Conference (DAC 23), 2023
  4. TCAD
    BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis
    Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi*, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Hu, Dian Zhou, Tao Cui, and  others
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 24), 2024
  5. JBHI
    Learning From Highly Confident Samples for Automatic Knee Osteoarthritis Severity Assessment: Data From the Osteoarthritis Initiative
    Yifan Wang, Zhaori Bi#, Yuxue Xie, Tao Wu, Xuan Zeng, Shuang Chen, and Dian Zhou
    IEEE Journal of Biomedical and Health Informatics (JBHI 21), 2021
  6. BMC geriatrics
    A parsimonious approach for screening moderate-to-profound hearing loss in a community-dwelling geriatric population based on a decision tree analysis
    Min Zhang, Zhaori Bi#, Xinping Fu, Jiaofeng Wang, Qingwei Ruan, Chao Zhao, Jirong Duan, Xuan Zeng, Dian Zhou, Jie Chen, and  others
    BMC geriatrics, 2019