| Jul 10, 2024 |
Our paper titled "ROI-HIT： Region of Interest-driven High- dimensional Microarchitecture Design Space Exploration" has been accepted with 2024 ESWEEK!
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| Jul 6, 2024 |
Our paper titled "Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis" has been accepted with 2024 ICCAD!
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| May 6, 2024 |
Our paper titled "Exploring High-dimensional Search Space via Voronoi Graph Traversing" has been accepted with 2024 UAI!
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| Apr 3, 2024 |
We won the OpenDACs 2023 Competition 1st place Award!
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| Mar 16, 2024 |
Our paper titled "EVDMARL： Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration" has been accepted with 2024 61th DAC!
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| Mar 16, 2024 |
Our paper titled "HiMOSS： A Novel High-Dimensional Multi-Objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing" has been accepted with 2024 61th DAC!
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| Feb 2, 2024 |
Our paper titled "D3PBO Dynamic Domain Decomposition based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing" has been accepted with ACM Transactions on Design Automation of Electronic Systems!
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| Dec 2, 2023 |
Our paper titled "Circuits Physics Constrained Predictor of Static IR Drop with Limited Data" has been accepted with 2024 DATE!
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| Dec 2, 2023 |
Our paper titled "tSS-BO： Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling" has been accepted with 2024 DATE!
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| Dec 1, 2023 |
Our paper titled "Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing" has been accepted with 2024 29th ASP-DAC!
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| Dec 1, 2023 |
Our paper titled "A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation"(Invited Paper) has been accepted with 2024 29th ASP-DAC!
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| Nov 1, 2023 |
We won the IEEE ICCAD CAD 2023 Problem C Honorable Mention Award!
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| Jul 1, 2023 |
I joined Integration, the VLSI journal as an Associate Editor.
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| Jun 7, 2023 |
Our paper titled "cVTS：A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis" has been accepted with 2023 60th DAC!
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