Our paper titled "Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing" has been accepted with 2024 29th ASP-DAC!
Abstract: For analog circuit sizing, constrained multi-objective optimization is an important and practical problem. With the popularity of multi-core machines and cloud computing, parallel/batch computing can significantly improve the efficiency of optimization algorithms. In this paper, we propose an Asynchronous Batch Constrained Multi-Objective Bayesian Optimization algorithm (ABCMOBO). Since the performances below the specifications are worthless, we adopt a dynamic reference point selection on the expected hypervolume improvement acquisition function for constraint handling. To save the time of waiting for all the simulations in the same batch to complete, ABCMOBO asynchronously evaluates the next candidate point if there is an idle worker. The experimental results quantitatively demonstrate that our proposed algorithms can reach 3.49-8.18x speed-up with comparable optimization results compared to the state-of-the-art asynchronous/synchronous batch multi-objective optimization methods.