Publications

AI for EDA

  1. DAC
    HiMOSS: A Novel High-Dimensional Multi-Objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing
    Tianchen Gu, Ruiyu Lyu, Zhaori Bi*, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, and Xuan Zeng
    In 2024 61th ACM/IEEE Design Automation Conference (DAC 24), 2024
  2. DAC
    EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration
    Handa Sun, Zhaori Bi*, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, and Xuan Zeng
    In 2024 61th ACM/IEEE Design Automation Conference (DAC 24), 2024
  3. DAC
    cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis
    Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi*, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, and Xuan Zeng
    In 2023 60th ACM/IEEE Design Automation Conference (DAC 23), 2023
  4. ICCAD
    Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis
    Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi*, Changhao Yan, Fan Yang, Dian Zhou, and Xuan Zeng
    In 2024 ACM/IEEE International Conference on Computer-Aided Design (ICCAD 24), 2024
  5. ESWEEK
    ROI-HIT: Region of Interest-driven High-dimensional Microarchitecture Design Space Exploration
    Xuyang Zhao, Tianning Gao, Aidong Zhao, Zhaori Bi*, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, and Xuan Zeng
    In 2024 CODES+ISSS (ESWEEK 24), 2024
  6. TCAD
    BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis
    Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi*, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Hu, Dian Zhou, Tao Cui, and  others
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 24), 2024
  7. TCAD
    pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment
    Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi*, Yuzhe Ma, Bei Yu, Wenchuang Hu, Dian Zhou, and Xuan Zeng
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 24), 2024
  8. TCAD
    Multiagent Based Reinforcement Learning (MA-RL): An Automated Designer for Complex Analog Circuits
    Jiarui Bao, Jinxin Zhang, Zhangcheng Huang, Xingwei Feng, Zhaori Bi, Xuan Zeng, and Ye Lu
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 24), 2024
  9. TCAD
    A batched Bayesian optimization approach for analog circuit synthesis via multi-fidelity modeling
    Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi*, and Xuan Zeng
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 23), 2022
  10. TCAD
    Smart-MSP: A self-adaptive multiple starting point optimization approach for analog circuit synthesis
    Yishi Yang, Hengliang Zhu, Zhaori Bi, Changhao Yan, Dian Zhou, Yangfeng Su, and Xuan Zeng
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 17), 2017
  11. TODAES
    D3PBO: Dynamic Domain Decomposition based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing
    Aidong Zhao, Tianchen Gu, Zhaori Bi*, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Hu, and Dian Zhou
    ACM Transactions on Design Automation of Electronic Systems (TODAES 24), 2024
  12. TODAES
    Optimization and quality estimation of circuit design via random region covering method
    Zhaori Bi, Dian Zhou, Sheng-Guo Wang, and Xuan Zeng
    ACM Transactions on Design Automation of Electronic Systems (TODAES 17), 2017
  13. TVLSI
    Automated technology migration methodology for mixed-signal circuit based on multistart optimization framework
    Liuxi Qian, Zhaori Bi, Dian Zhou, and Xuan Zeng
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI 14), 2014
  14. DATE
    tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling
    Tianchen Gu, Jiaqi Wang, Zhaori Bi*, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, and Xuan Zeng
    In 2024 Design, Automation and Test in Europe Conference (DATE 24), 2024
  15. DATE
    Circuits Physics Constrained Predictor of Static IR Drop with Limited Data
    Yuan Meng, Ruiyu Lyu, Zhaori Bi*, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, and Xuan Zeng
    In 2024 Design, Automation and Test in Europe Conference (DATE 24), 2024
  16. ASP-DAC
    Synchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing
    Xuyang Zhao, Zhaori Bi*, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, and Xuan Zeng
    In 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC 24), 2024
  17. ASP-DAC
    A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation
    Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi*, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, and Xuan Zeng
    In 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC 24), 2024
  18. ASP-DAC
    A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench
    Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, and Dian Zhou
    In 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC 22), 2022
  19. ISCAS
    A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion
    Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, and Xuan Zeng
    In 2022 IEEE International Symposium on Circuits and Systems (ISCAS 22), 2022
  20. ISEDA
    HD-MCTS: An Analog Circuit Optimization Algorithm Based on High-dimensional Monte Carlo Tree Search
    Zhao Yiyang, Lemeng Li, Ruiyu Lyv, Zhaori Bi*, Changhao Yan, and Xuan Zeng
    In 2022 IEEE International Symposium of EDA (ISEDA 24), 2024
  21. ISEDA
    High-Dimensional Analog Circuit Sizing via Bayesian Optimization in the Variational Autoencoder Enhanced Latent Space
    Wangzhen Li, Zhaori Bi*, and Xuan Zeng
    In 2022 IEEE International Symposium of EDA (ISEDA 24), 2024
  22. ISEDA
    Automated Design of Analog Circuits Based on Parallel Trust Region Bayesian Optimization
    Peng Dong, Ruiyu Lyu, Chunxi Wang, Jiale Chen, Linfeng Jiang, Cunqing Lan, Zhaori Bi*, and Changhao Yan
    In 2022 IEEE International Symposium of EDA (ISEDA 24), 2024
  23. ISEDA
    Topology Optimization of Operational Amplifiers Using A Performance-aware Representation
    Jinyi Shen, Fan Yang, Li Shang, Changhao Yan, Zhaori Bi, Dian Zhou, and Xuan Zeng
    In 2022 IEEE International Symposium of EDA (ISEDA 24), 2024
  24. ISEDA
    On Accelerating Domain-Specific MC-TS with Knowledge Retention and Efficient Parallelization for Logic Optimization
    Cunqing Lan, Xinyao Wang, Zijian Jiang, Hongyang Pan, Keren Zhu, Zhaori Bi, Changhao Yan, and Xuan Zeng
    In 2022 IEEE International Symposium of EDA (ISEDA 24), 2024
  25. MWSCAS
    Analog circuit performance bound estimation based on extreme value theory
    Minghua Li, Zhaori Bi, Dian Zhou, and Xuan Zeng
    In 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS 15), 2015
  26. ASCION
    Mixed-signal system verification by SystemC/SystemC-AMS and HSIM-VCS in near field communication tag design
    Zhaori Bi, Wei Li, Dian Zhou, Xuan Zeng, and Sheng-Guo Wang
    In 2013 IEEE 10th International Conference on ASIC (ASCION 13), 2013
  27. Thesis
    Efficient and Quality Assured Techniques for Analog Circuit Design Automation
    Zhaori Bi
    2017
  28. Thesis
    Near field communication system design with a circuit implementation
    Zhaori Bi
    2013

AI for Medical

  1. JBHI
    Learning From Highly Confident Samples for Automatic Knee Osteoarthritis Severity Assessment: Data From the Osteoarthritis Initiative
    Yifan Wang, Zhaori Bi#, Yuxue Xie, Tao Wu, Xuan Zeng, Shuang Chen, and Dian Zhou
    IEEE Journal of Biomedical and Health Informatics (JBHI 21), 2021
  2. KBPR
    Modification and validation of the phosphate removal model: a multicenter study
    Weichen Zhang, Qiuna Du, Jing Xiao, Zhaori Bi, Chen Yu, Zhibin Ye, Mengjing Wang, and Jing Chen
    Kidney and Blood Pressure Research, 2021
  3. BMC nephrology
    Higher one-year achievement rate of serum phosphate associated with lower cardiovascular mortality in hemodialysis patients
    Weichen Zhang, Guoxin Ye, Zhaori Bi, Weisheng Chen, Jing Qian, Minmin Zhang, Ding Ding, Mengjing Wang, and Jing Chen
    BMC nephrology, 2021
  4. Renal Failure
    Effects of a high-phosphorus diet on the gut microbiota in CKD rats
    Guoxin Ye, Wei Yang, Zhaori Bi, Liya Huang, and Fang Liu
    Renal Failure, 2021
  5. Renal Failure
    Dominant factors of the phosphorus regulatory network differ under various dietary phosphate loads in healthy individuals
    Guoxin Ye, Jiaying Zhang, Zhaori Bi, Weichen Zhang, Minmin Zhang, Qian Zhang, Mengjing Wang, and Jing Chen
    Renal Failure, 2021
  6. JTEHM
    A practical electronic health record-based dry weight supervision model for hemodialysis patients
    Zhaori Bi, Mengjing Wang, Li Ni, Guoxin Ye, Dian Zhou, Changhao Yan, Xuan Zeng, and Jing Chen
    IEEE Journal of Translational Engineering in Health and Medicine(JTEHM 19), 2019
  7. BMC geriatrics
    A parsimonious approach for screening moderate-to-profound hearing loss in a community-dwelling geriatric population based on a decision tree analysis
    Min Zhang, Zhaori Bi#, Xinping Fu, Jiaofeng Wang, Qingwei Ruan, Chao Zhao, Jirong Duan, Xuan Zeng, Dian Zhou, Jie Chen, and  others
    BMC geriatrics, 2019